Disputationer
Fr 6 september
| Mån | Tis | Ons | Tor | Fre | Lör | Sön | |
|---|---|---|---|---|---|---|---|
| v35 | 1 | ||||||
| v36 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
| v37 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
| v38 | 16 | 17 | 18 | 19 | 20 | 21 | 22 |
| v39 | 23 | 24 | 25 | 26 | 27 | 28 | 29 |
| v40 | 30 |
6
september
fredag, 10:00
Disputationer
Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging
Electrical Measurements
Plats: Room F3, Lindstedtsvägen 26
Respondent: Martin Lapisa
2013-09-06T10:00
2013-09-06T10:00
Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging (Disputationer)
Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging (Disputationer)