IL2200 ASIC-design Methodology with High-level Languages 7.5 credits

ASIC-design metodik med hårdvarubeskrivande språk

Academic level (A-D) D Subject area
Educational level 2 Grade scale A, B, C, D, E, FX, F

Autumn 09 for programme students

Periods 2 (7.5 cr) Application code 70739
Start date 26/10/2009 End date 18/12/2009
Language of instruction English Campus KTH Kista
Course pace 50% Tutoring time Daytime
Number of places Form of study NML
Course responsible Hemani, Ahmed
Teacher Öberg, Johnny

Goals

After the course the student shall be able to 
- describe the different phases of the design flow for digital ASICs
- explain how non-functional design constraints affect the design process
- categorize different types of ASICs and explain their technology
- explain how hardware description language patterns are realized in hardware
- introduce extra hardware in order to improve the testability of a design
- name and explain techniques for the test and verification of a design
- control the design process by assigning constraints and properties in order to yield an efficient implementation of a design
- write a design specification using a hardware description languages in such a way that it can be efficiently implemented in an ASIC
- apply techniques to analyze the timing of the final implementation

Content

  • ASIC design flow
  • ASIC technologies
  • Classification and specification constraints for logic synthesis
  • Static timing analysis
  • State machine synthesis
  • Test and verification
  • Low power design and logic synthesis
  • Design for testability
  • Technology mapping
  • Physical design issues 

Eligibility

IL2217 or similar.

Literature

The course book is announced on the course web page one month before course start.

Examination

  • LAB1 - Laboratory Course, 3.0 credits, grade scale: P, F
  • TEN1 - Examination, 4.5 credits, grade scale: A, B, C, D, E, FX, F

Grading scale: A/B/C/D/E/Fx/F

Requirements for final grade

Written exam, 4.5 hp (TEN1: Grade A-F)
Laboratory course, 3.0 hp (LAB1: Grade P, F)  

The grade of the written exam (TEN1) is also the final grade of the course.  

The lab course must be completed during the study year. If the course is not completed during the study year old laboratories are not counted anymore. 

Offered by

ICT/Electronic Systems

Contact

Ahmed Hemani

Examiner

Ahmed Hemani

Supplementary information

ASIC = Application Specific Integrated Circuit
FPGA = Field Programmable Gate Array
VHDL = VHSIC Hardware Description Language
VHSIC = Very High Speed Integrated Circuit

Version

Course plan valid from: Autumn 08.

Print Last updated: 2009-11-02