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Seminar 2014-10-30

Rethinking Code Generation in Compilers

Speaker: Christian Schulte


The talk will focus on a new model for global register allocation that combines many advanced aspects: multiple register banks (subsuming spilling to memory), ultimate coalescing, spill code optimization, and register packing. The model is extended to include instruction scheduling and bundling. Thorough experiments using MediaBench and a processor (Hexagon) that are typical for embedded systems demonstrate that the approach: is robust and scalable; generates faster code than LLVM (up to 41% with a mean improvement of 7%); possibly generates optimal code (for 29% of the experiments); effortlessly supports different optimization criteria (code size on par with LLVM).


Page responsible:Web editors at EECS
Belongs to: Software and Computer Systems
Last changed: Jan 12, 2015