Protecting Remote FPGAs and Embedded Devices from Non-Invasive Physical Attacks
Time: Wed 2025-06-11 09.00
Location: Ka-Sal C (Sven-Olof Öhrvik), Kistagången 16, Kista
Language: English
Subject area: Information and Communication Technology
Doctoral student: Can Aknesil , Elektronik och inbyggda system
Opponent: Assistant Professor Francesco Regazzoni, University of Amsterdam
Supervisor: Professor Elena Dubrova, Elektronik och inbyggda system; Zhonghai Lu, Elektronik och inbyggda system
QC 20250514
Abstract
The remote computing market has been growing rapidly for more than ten years, and this growth is expected to continue in the future. A considerable portion of this market is held by data centers, which today offer a diverse range of acceleration technologies for cloud computing, from massive multiprocessing to field-programmable gate arrays (FPGAs). Another significant portion is held by embedded devices in specialized mechanical and electronic systems from motor vehicles to home security systems. Valuable intellectual properties and sensitive information are being deployed in the cloud and embedded devices, which require strong protection. Besides the benefits, the industry’s shift toward remote computing comes with increased vulnerability to physical attacks. FPGAs and embedded devices are among the electronic devices that are most vulnerable to physical attacks, because they may be deployed in a location physically accessible by potential adversaries. This thesis aims to protect FPGAs and embedded devices from physical attacks by exploring the boundaries of possible attack vectors and introducing new countermeasures.
This thesis contains six research papers. The first paper presents an FPGA implementation of a novel arbiter physically unclonable function (PUF) with 4×4 switch blocks. The PUF provides a more resource-efficient solution to secure key generation and storage on FPGAs. The second paper presents near-field electromagnetic deep learning-based side-channel analysis performed on Raspberry Pi 3, a widely-used single-board computer. The paper investigates the generalizability of side-channel analysis by focusing on the extraction of data in memory operations. The third and fourth papers present covert transmitting antennas and covert near-field EM sensors, respectively, both implemented entirely within the FPGA configurable fabric. The results highlight wireless covert channels as a plausible attack vector for cloud FPGAs and point to the need for further research on the topic. The fifth paper aims to improve IP security in FPGA clouds by introducing circuit disguise, a new method that enables FPGA design checks to be performed in the cloud without requiring the disclosure of the clients’ unprotected designs. Last but not least, the sixth paper presents a hybrid method for fingerprinting neural networks by combining power side-channel measurements with information domain metrics.