Class information for:
Level 1: FPGA ROUTING//SEGMENTED CHANNEL//LOGIC EMULATION

Basic class information
Bar chart of Publication_year

Last years might be incomplete

Hierarchy of classes
The table includes all classes above and classes immediately below the current class.


Cluster id Level Cluster label #P
12 4 COMPUTER SCIENCE, THEORY & METHODS//COMPUTER SCIENCE, INFORMATION SYSTEMS//COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE 1181119
295 3       COMPUTER SCIENCE, HARDWARE & ARCHITECTURE//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 41956
1557 2             IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS//HIGH LEVEL SYNTHESIS//COMPUTER SCIENCE, HARDWARE & ARCHITECTURE 7619
31002 1                   FPGA ROUTING//SEGMENTED CHANNEL//LOGIC EMULATION 174

Terms with highest relevance score


rank Category termType chi_square shrOfCwithTerm shrOfTermInClass termInClass
1 FPGA ROUTING authKW 754714 3% 83% 5
2 SEGMENTED CHANNEL authKW 579620 2% 80% 4
3 LOGIC EMULATION authKW 566033 3% 63% 5
4 HYPERUNIVERSAL authKW 543395 2% 100% 3
5 SEGMENTED CHANNEL ROUTING authKW 543395 2% 100% 3
6 BOARD LEVEL ROUTING authKW 362264 1% 100% 2
7 POLYGONAL SWITCHING NETWORK authKW 362264 1% 100% 2
8 ROUTING NETWORK authKW 362264 1% 100% 2
9 ROW BASED FPGA authKW 362264 1% 100% 2
10 UNIVERSAL SWITCH BLOCK authKW 362264 1% 100% 2

Web of Science journal categories


chi_square_rank Category chi_square shrOfCwithTerm shrOfTermInClass termInClass
1 Computer Science, Hardware & Architecture 21675 63% 0% 109
2 Engineering, Electrical & Electronic 2749 72% 0% 126
3 Computer Science, Interdisciplinary Applications 930 20% 0% 35
4 Computer Science, Software Engineering 875 17% 0% 29
5 Computer Science, Theory & Methods 409 14% 0% 24
6 Computer Science, Information Systems 102 7% 0% 12
7 Computer Science, Cybernetics 22 1% 0% 2
8 Engineering, Aerospace 17 2% 0% 3
9 Education, Scientific Disciplines 6 1% 0% 2
10 Women’s Studies 5 1% 0% 1

Address terms


chi_square_rank term chi_square shrOfCwithTerm shrOfTermInClass termInClass
1 COMP PLATFORMS 181132 1% 100% 1
2 FMVG 181132 1% 100% 1
3 MENTOR EMULAT 181132 1% 100% 1
4 MICROSYST TECHOL 181132 1% 100% 1
5 PROC SYST SOFTWARE PLICAT ENGN 181132 1% 100% 1
6 SYST ENGN COMP PROGRAM 181132 1% 100% 1
7 CMG 65863 1% 18% 2
8 VERIFICAT GRP 45281 1% 25% 1
9 DIGITAL DESIGN ENVIRONM 25874 1% 14% 1
10 LEHRSTUHL TECH INFORMAT 20124 1% 11% 1

Journals


chi_square_rank term chi_square shrOfCwithTerm shrOfTermInClass termInClass
1 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 39759 19% 1% 33
2 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 21976 12% 1% 21
3 VLSI DESIGN 7991 3% 1% 5
4 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS 5581 3% 1% 5
5 JOURNAL OF AEROSPACE INFORMATION SYSTEMS 3446 1% 1% 2
6 IEEE TRANSACTIONS ON COMPUTERS 2762 5% 0% 9
7 IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES 2215 6% 0% 10
8 IEEE CIRCUITS AND DEVICES MAGAZINE 1320 1% 1% 1
9 INTERNATIONAL JOURNAL OF ELECTRONICS 1317 3% 0% 6
10 JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS 851 2% 0% 3

Author Key Words


chi_square_rank term chi_square shrOfCwithTerm shrOfTermInClass termInClass LCSH search Wikipedia search
1 FPGA ROUTING 754714 3% 83% 5 Search FPGA+ROUTING Search FPGA+ROUTING
2 SEGMENTED CHANNEL 579620 2% 80% 4 Search SEGMENTED+CHANNEL Search SEGMENTED+CHANNEL
3 LOGIC EMULATION 566033 3% 63% 5 Search LOGIC+EMULATION Search LOGIC+EMULATION
4 HYPERUNIVERSAL 543395 2% 100% 3 Search HYPERUNIVERSAL Search HYPERUNIVERSAL
5 SEGMENTED CHANNEL ROUTING 543395 2% 100% 3 Search SEGMENTED+CHANNEL+ROUTING Search SEGMENTED+CHANNEL+ROUTING
6 BOARD LEVEL ROUTING 362264 1% 100% 2 Search BOARD+LEVEL+ROUTING Search BOARD+LEVEL+ROUTING
7 POLYGONAL SWITCHING NETWORK 362264 1% 100% 2 Search POLYGONAL+SWITCHING+NETWORK Search POLYGONAL+SWITCHING+NETWORK
8 ROUTING NETWORK 362264 1% 100% 2 Search ROUTING+NETWORK Search ROUTING+NETWORK
9 ROW BASED FPGA 362264 1% 100% 2 Search ROW+BASED+FPGA Search ROW+BASED+FPGA
10 UNIVERSAL SWITCH BLOCK 362264 1% 100% 2 Search UNIVERSAL+SWITCH+BLOCK Search UNIVERSAL+SWITCH+BLOCK

Core articles
The table includes core articles in the class. The following variables is taken into account for the relevance score of an article in a cluster c:
(1) Number of references referring to publications in the class.
(2) Share of total number of active references referring to publications in the class.
(3) Age of the article. New articles get higher score than old articles.
(4) Citation rate, normalized to year.

Classes with closest relation at Level 1


rank cluster_id2 link
1 14836 CHANNEL ROUTING//VLSI LAYOUT//IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
2 6973 RECONFIGURABLE COMPUTING//ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS//RECONFIGURABLE ARCHITECTURES
3 17103 FLOORPLANNING//PHYSICAL DESIGN//PLACEMENT
4 31010 ANTIFUSE//LOGIC NONVOLATILE MEMORY NVM//MULTITIME PROGRAMMABLE MTP
5 12579 FAULT INJECTION//CONTROL FLOW CHECKING//SRAM BASED FPGA
6 19522 HYPERGRAPH PARTITIONING//CIRCUIT PARTITIONING//GRAPH PARTITIONING
7 17551 GLOBAL ROUTING//STEINER TREE//STEINER MINIMAL TREE
8 37601 ROUTING NUMBER//BIOLOGICAL FRAGILITY//BOUNDED BUFFERS
9 21357 INTEGER WEIGHTS//ALGORITHMIC MAPPING//RECALL PHASE
10 14585 SATISFIABILITY//QUANTIFIED BOOLEAN FORMULAS//MAX SAT

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