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ID2218 Design of Fault-tolerant Systems 7.5 credits

Information per course offering

Termin

Information for Spring 2025 Start 17 Mar 2025 programme students

Course location

KTH Kista

Duration
17 Mar 2025 - 2 Jun 2025
Periods
P4 (7.5 hp)
Pace of study

50%

Application code

60820

Form of study

Normal Daytime

Language of instruction

English

Course memo
Course memo is not published
Number of places

25 - 100

Target group

Open to all programmes as long as it can be included in your programme.

Planned modular schedule
[object Object]

Contact

Examiner
No information inserted
Course coordinator
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Teachers
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Course syllabus as PDF

Please note: all information from the Course syllabus is available on this page in an accessible format.

Course syllabus ID2218 (Spring 2025–)
Headings with content from the Course syllabus ID2218 (Spring 2025–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

Fault tolerance is the ability of a system to continue to carry out their intended function despite faults. In a broad sense, fault tolerance is associated with reliability, with successful operation, and with the absence of breakdowns The ultimate goal of fault tolerance is to develop a reliable system. When the society becomes increasingly dependant on computer systems, the reliability of these systems becomes a critical question. In airplanes, chemical plants, heart pace-makers or other safety-critical applications, a system failure can cost people's lives or environmental disaster. There are different approaches to achieve fault tolerance. . Common to all these approaches is a certain amount of redundancy. This can be a replicated hardware component, an additional check bit attached to a string of digital data, or a few lines of program code verifying the correctness of the program's results. In this course, we will study fault tolerance in both hardware and software. The rapid development of real-time computing applications that started around the mid-1990s, especially the demand for software-embedded intelligent devices, made software fault tolerance a pressing issue The following is a tentative list of topics to be covered:

  • Introduction
  • Definition of fault tolerance
  • Redundancy
  • Applications of fault tolerance
  • Basic principles of reliability
  • Attribute: reliability, accessibility, safety
  • Deficiencies: errors, mistakes and failures
  • Means: prevention, removal and forecasting
  • Reliability evaluation
  • Common measures: failure rate, mean time to failure, mean time to repair, etc.
  • Reliability block diagram
  • Markov processes
  • Hardware redundancy
  • Redundancy timetables
  • Evaluation and comparison and applications
  • Information redundancy
  • Codes: linear, Hamming, cyclic, unordered, arithmetic, etc.
  • Encoding and decoding technicians and applications
  • Time redundancy
  • Software fault tolerance
  • Specific features
  • Software fault tolerance techniques: N-version programming, recovery block, self-monitoring software, etc.

Intended learning outcomes

After passing the course, the student shall be able to

  • give an account of the basic concepts in fault tolerance
  • describe basic techniques to achieve fault tolerance in electronic systems, communication systems and software systems
  • demonstrate skills in modelling and evaluating fault tolerant architectures in terms of reliability, accessibility and safety
  • describe sources of faults and methods to prevent and anticipate sources of faults
  • give an account of the advantages and the limitations of fault tolerant design.

Literature and preparations

Specific prerequisites

Knowledge in digital technology (Boolean algebra and logical circuits), 2 higher education credits, equivalent completed course IE1204/IE1205/HE1026 or IS1500.

Knowledge in mathematics in at least one of the following fields:

  • Knowledge in algebra and geometry, 7.5 higher education credits, equivalent to completed course SF1624

or

  • Knowledge in discrete mathematics, 3 higher education credits, equivalent to completed course SF1688/SF1610/SF1630/SF1662/SF1679.

Recommended prerequisites

Basic understanding of circuits and digital logic.

Equipment

No information inserted

Literature

No information inserted

Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F

Examination

  • ANN1 - Assignment, 1.5 credits, grading scale: A, B, C, D, E, FX, F
  • TEN1 - Examination, 1.5 credits, grading scale: A, B, C, D, E, FX, F
  • TEN2 - Examination, 4.5 credits, grading scale: A, B, C, D, E, FX, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

The examination consists of five assignments, a written examination in the middle of the course and a written final examination.

Opportunity to complete the requirements via supplementary examination

No information inserted

Opportunity to raise an approved grade via renewed examination

No information inserted

Examiner

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

Main field of study

Electrical Engineering

Education cycle

Second cycle

Add-on studies

No information inserted

Supplementary information

In this course, the EECS code of honor applies, see: http://www.kth.se/en/eecs/utbildning/hederskodex.