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IL1203 Design of Digital Integrated Circuits - LSI 7.5 credits

Course offerings are missing for current or upcoming semesters.
Headings with content from the Course syllabus IL1203 (Autumn 2008–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

An overview of IC development and trends. A review of basic properties of MOS transistors relevant for digital logic design. CMOS layout and design rules.

Process parameters. Design specification. Floorplan. The CMOS inverter,

physical layout and electrical properties. Static CMOS. Logic gates.

Boolean functions and dual expressions. Synthesis of CMOS- logic.

Design of buffer drivers and interface logic. Design of elementary

sequential logic circuits. Dynamic CMOS circuits. Design for testability.

Laboratory work and a design project are intended to give the students

good knowledge of design and verification of CMOS logic circuits.

Important requirements to pass the course are homeworks, related to exercises

and laboratory work, and an IC design project.

A written design specification is compulsory to start the project design phase.

The circuit behaviour must be verified by simulation and documented together with a description of the logic function and layout of circuit leaf cells of the integrated circuit. Finally the project is presented for a teacher and some students of the course.

Intended learning outcomes

After having completed the course a student should be able to

- analyse and synthesize digital logic CMOS circuits of LSI complexity
- apply theory and practice for designing digital logic circuits and logic system designs
- formulate and use computational models to solve problems of physical design types
- develope the geometric floorplan for the physical layout for the architecture of the circuit design
- manage a computer based graphic editor for physical circuit layou
- verify the design behavior specification using a simulator

Literature and preparations

Specific prerequisites

No information inserted

Recommended prerequisites

IE1204 Digital Design.

Equipment

No information inserted

Literature

Jan M. Rabaye : Digital Integrated Circuits :
A Design Perspective (2nd Edition)
Prentice-Hall 2003, ISBN 0-13-120764-4

Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F

Examination

  • ANN1 - Project Work, 4.5 credits, grading scale: A, B, C, D, E, FX, F
  • LAB1 - Laboratory Course, 3.0 credits, grading scale: P, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

Grading scale: A/B/C/D/E/Fx/F

Other requirements for final grade

A written project report is required as well as the project must be presented for a teacher and some students of the course (ANN1 4,5 hp) .
Well done laboration Homeworks (LAB1 3 hp) .
For the grade A or B an extra account is needed

Opportunity to complete the requirements via supplementary examination

No information inserted

Opportunity to raise an approved grade via renewed examination

No information inserted

Examiner

No information inserted

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

Main field of study

Electrical Engineering, Technology

Education cycle

First cycle

Add-on studies

No information inserted

Contact

Hellberg, Lars ( larshe@kth.se )