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IH2657 Design of Nano Semiconductor Devices 7.5 credits

This course covers the most important device in all integrated circuits - the nanometer sized silicon MOSFETs. The focus is on low-power CMOS technology. 

We cover technology and device trends, physics of the MOS structure, MOSFET scaling theory (Moore's law and roadmap), nanometer design, device topologies (SOI, FinFET, nanowires/sheets), memory, low power design, new emerging techniques and applications including spintronics and non-volatile memories .


Choose semester and course offering

Choose semester and course offering to see current information and more about the course, such as course syllabus, study period, and application information.


For course offering

Spring 2025 Start 17 Mar 2025 programme students

Application code


Headings with content from the Course syllabus IH2657 (Spring 2022–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

This course treats the most important component in all integrated circuits - the MOSFET-transistor that is produced in silicon with nanometer dimensions. The focus is on low power CMOS-technology.

Course main content

  • Basic physics for the MOS-system and formulation of approximate current-voltage relations for the MOS-transistor. Compact physics based models for circuit simulation. Modelling of process corners.
  • Scaling theory and technology nodes for CMOS technology.
  • Modern CMOS device topologies, SOI and FinFET, 3D-structures including nanowire/sheet.
  • Power consumption, crosstalk and scaling of interconnects.
  • Memory technologies, charge based, resistive or based on other physical principles.
  • New technologies and applications as for instance spintronics, 2D-materials, and 3D-fabrication.
  • Circuit design for nanometer CMOS, ASIC, FPGA, design rules, robustness, testing, reliability, error analysis, variability on component, chip and wafer level.

Intended learning outcomes

After passing the course, the student shall be able to

  • describe properties and limitations of a MOSFET transistor in an advanced CMOS technology node
  • give an account of a methodological circuit design in nanometer CMOS technology that takes into account  power consumption robustness, design rules, variations in device performance etc          
  • justify the need of new component and circuit topologies including 3D-fabrication
  • give examples of components and materials that are appropriate to replace or would be complementary to silicon-based CMOS or charge based memories for example for low supply voltages or low power applications
  • use physical and compact modelling to design components with desirable properties equivalent to a future technology node
  • analyse and critically discuss research publications with regard to the relevance for technical development in the device field
  • discuss advanced semiconductor fabrication from a sustainability perspective with a focus on energy consumption and other finite resources and raw materials.

Literature and preparations

Specific prerequisites

Knowledge in silicon-based semiconductor components, 7.5 higher education credits, equivalent to completed course IH1611.

Recommended prerequisites

A basic course in semiconductor devices or semiconductor physics.


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Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F


  • LAB1 - Computer labs and home assignments, 3.0 credits, grading scale: P, F
  • TEN1 - Oral exam, 4.5 credits, grading scale: A, B, C, D, E, FX, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

The previous examination module ANN1 is replaced by TEN1 and LAB1. 

Opportunity to complete the requirements via supplementary examination

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Opportunity to raise an approved grade via renewed examination

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Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

Main field of study

Electrical Engineering

Education cycle

Second cycle

Add-on studies

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Supplementary information

In this course, the EECS code of honor applies, see: