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IH2657 Design of Nano Semiconductor Devices 7.5 credits

This course covers the most important device in all integrated circuits - the nanometer sized silicon MOSFETs. The focus is on low-power CMOS technology. 

We cover technology and device trends, physics of the MOS structure, MOSFET scaling theory (Moore's law and roadmap), nanometer design, device topologies (SOI, FinFET, nanowires/sheets), memory, low power design, new emerging techniques and applications including spintronics and non-volatile memories .


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Choose semester and course offering to see information from the correct course syllabus and course offering.

Headings with content from the Course syllabus IH2657 (Spring 2019–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

This course covers the the most important device in silicon: nanometer sized MOSFETs for digital high speed operation. Sections: Historical background of semiconductor devices, technology and device trends, physics of the MOS structure, MOSFET scaling theory, nanometer design, silicon-on-insulator (SOI), and new techniques such as nanotubes and nanowires. Apart from the text book, research articles are studied, and the students select one to present in English in a seminar.

Intended learning outcomes

The course is about advanced nanometerscaled semiconductor devices for application areas such as very large-scale integrated circuits and for high-speed communications.

After the course, the student should be able to

- analyse the operation of semiconductor devices

- analyse delay times from parasitics

- analyse scaling of MOSFETs

- design a scaled down device from a given device

- discuss semiconductor devices based on research articles

With analyse is meant to derive relations and calculate from equations given in the textbook.

Course disposition

No information inserted

Literature and preparations

Specific prerequisites

No information inserted

Recommended prerequisites

A basic course in semiconductor devices or semiconductor physics.


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Fundamentals of Modern VLSI Devices, Y. Taur &T Ning

Upplaga: 1 Förlag: Cambridge År: 1998


Övrig litteratur

Forskningsartiklar från tex IEEE-tidskrifter.

Research articles from e.g. IEEE journals.

Examination and completion

If the course is discontinued, students may request to be examined during the following two academic years.

Grading scale

A, B, C, D, E, FX, F


  • ANN1 - Examination, 7,5 hp, betygsskala: A, B, C, D, E, FX, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

Other requirements for final grade

Homework assignments, computer lab and seminar presentation. Grading is based in equal parts on the three tasks. (ANN1; 7,5 hp)

Opportunity to complete the requirements via supplementary examination

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Opportunity to raise an approved grade via renewed examination

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Profile picture Carl-Mikael Zetterling

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course web

Further information about the course can be found on the Course web at the link below. Information on the Course web will later be moved to this site.

Course web IH2657

Offered by

EECS/Electrical Engineering

Main field of study

Electrical Engineering

Education cycle

Second cycle

Add-on studies

No information inserted

Supplementary information

In this course, the EECS code of honor applies, see: