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IS2202 Computer Systems Architecture 7.5 credits

The overall objective with the course is to give knowledge and insights into the design of modern computers, in particular the processor design including parallel computational pipelines and advanced memory hierarchies.

Information per course offering

Termin

Information for Autumn 2026 Start 26 Oct 2026 programme students

Course location

KTH Campus

Duration
26 Oct 2026 - 11 Jan 2027
Periods

Autumn 2026: P2 (7.5 hp)

Pace of study

50%

Application code

11200

Form of study

Normal Daytime

Language of instruction

English

Course memo
Course memo is not published
Number of places

Min: 1

Target group
Open to all programmes as long as it can be included in your programme
Planned modular schedule
[object Object]
Schedule
Schedule is not published

Contact

Examiner
No information inserted
Course coordinator
No information inserted
Teachers
No information inserted

Course syllabus as PDF

Please note: all information from the Course syllabus is available on this page in an accessible format.

Course syllabus IS2202 (Autumn 2026–)
Headings with content from the Course syllabus IS2202 (Autumn 2026–) are denoted with an asterisk ( )

Content and learning outcomes

Course contents

The course provides advanced knowledge of how a computer works and is constructed from both a hardware and software perspective. Basic terms and concepts within the course:

  • Design of computer processors, including superscalarity, application-specific instruction set processors (ASIPs), and custom processor instructions
  • Computer memory subsystems, input and output (I/O), caches and advanced cache coherence mechanisms
  • Advanced architecture accelerators, such as graphics processing units (GPUs), vector architectures, and systolic arrays
  • Performance measurement (benchmarking) of computer architectures at different levels
  • Modeling and tools for computer architecture

Intended learning outcomes

After passing the course, the student should be able to

  • account for the basic quantitative principles of computer design
  • explain the function of modern processors such as superscalarity, dynamic scheduling of instructions, and parallelism
  • explain how modern accelerators with vector, graphics, and systolic architectures work
  • explain the design and function of a memory hierarchy for the above mentioned microprocessors
  • describe how simulation can be used to evaluate different architectural alternatives
  • design a superscalar microprocessor with parallel computational pipelines 
  • propose and design a modification to a processor architecture that potentially provides improved performance
  • empirically compare and contrast different architectural decisions with one another in terms of performance and against standard criteria.

Literature and preparations

Specific prerequisites

Knowledge and skills in programming, 6 credits, equivalent to completed course DD1337/DD1310-DD1319/DD1321/DD1331/DD1333/DD100N/ID1018/ID1022.

Knowledge in computer technology/computer architecture, 6 credits, equivalent to completed course EP1200/IS1200/IS1500.

Knowledge in digital system design and verification with hardware description languages, 4 credits, equivalent to completed course IL2234 or completed exam module LABA or TEN1 in IL2234.

Recommended prerequisites

Knowledge in computer organisation corresponding to IS1200 Computer Hardware Engineering.

Literature

You can find information about course literature either in the course memo for the course offering or in the course room in Canvas.

Examination and completion

Grading scale

A, B, C, D, E, FX, F

Examination

  • TEN2 - Written Exam, 3.0 credits, grading scale: A, B, C, D, E, FX, F
  • LAB2 - Laboratory Work, 4.5 credits, grading scale: P, F

Based on recommendation from KTH’s coordinator for disabilities, the examiner will decide how to adapt an examination for students with documented disability.

The examiner may apply another examination format when re-examining individual students.

If the course is discontinued, students may request to be examined during the following two academic years.

Examiner

Ethical approach

  • All members of a group are responsible for the group's work.
  • In any assessment, every student shall honestly disclose any help received and sources used.
  • In an oral assessment, every student shall be able to present and answer questions about the entire assignment and solution.

Further information

Course room in Canvas

Registered students find further information about the implementation of the course in the course room in Canvas. A link to the course room can be found under the tab Studies in the Personal menu at the start of the course.

Offered by

Main field of study

Computer Science and Engineering

Education cycle

Second cycle

Transitional regulations

Students who have not completed LAB1 from a previous version of the course can report it up to and including the academic year 2027/2028.

Students who have not completed TEN1 from a previous version of the course can be examined on TEN1 up to and including the academic year 2027/2028.

Supplementary information

In this course, the EECS code of honor applies, see: http://www.kth.se/en/eecs/utbildning/hederskodex.

Access to own computer.