Skip to main content

Artur Podobas

Profile picture of Artur Podobas

ASSOCIATE PROFESSOR, docent

Details

Telephone
Address
KISTAGÅNGEN 16

About me

Hello and welcome to my profile page. My name is Artur Podobas, and I am a Assistant Professor in computer systems.

Some Recent News:

Projects

1)IO-SEA PI (from Vetenskapsrådet side)

2) Work-package leader (WP2) for theVESTEC projecton in-situ visualization

History

I defended my Ph.D. thesis at KTH Royal Institute of Technology in December 2015. My Ph.D. topic was on the task-based parallel programming model found in common systems such as OpenMP, Intel Cilk, Threading Building Blocks, and more. You can find my Ph.D. dissertationhere. My Ph.D. supervisors were Prof. Mats Brorsson and Prof. Vladimir Vlassov. My focus was to research and explore the task-based programming model, particularly close to the hardware. For example, I built (among of the first) High-Level Synthesis tools that target automatic hardware generation directly from OpenMP tasks (if you like HLS, read my publicationhere andhere) and also researched high-performance runtime systems to efficiently leverage such systems (best paper IWOMP'14, find ithere). My Ph.D. was funded by two EC projects: ENCORE (led by Barcelona Supercomputing Centre) and PaPP (led by KTH/SICS). After my defense, I spent one year working as a post-doc at Denmark's Technical University (DTU Compute), where I was working in the COPCAMS and continued my work with high-performance OpenMP runtime systems.
In 2016, I received the prestigiousJSPS scholarship and traveled to Japan to do a postdoctoral fellowship under Prof. Satoshi Matsuoka's mentorship atMatsulab at the Tokyo Institute of Technology, Japan. During this time, I was fortunate enough to work with fantastic colleagues and students, focusing on building High-Performance Hardware Accelerators using FPGAs. Amongst others,we built one of the fastest 2D and 3D Stencil Accelerators on FPGAs to this day. During this time, I also created thefirst high-performance Posit Arithmetic Unit for FPGAs(capable of running at hundreds of MHz).


In 2019, I was working at RIKEN Centre for Computational Science (R-CCS), which is the largest Japanese research institute and home to the top#1 supercomputer Fugaku (seeTOP500 list). Here, I was working inProf. Kentaro Sano's Processor Research Division on emerging computer architectures and non-Von-Neumann systems-- one of the leading groups in architecture in Japan.

Today, I am an assistant professor in High-Performance Computing, specializing in Hardware Accelerators.


Courses

Computer Hardware Engineering (IS1200), teacher | Course web

Computer Organization and Components (IS1500), examiner, course responsible | Course web

Computer Systems Architecture (IS2202), examiner, course responsible, teacher, assistant | Course web

Computer Systems Architecture (FIS3202), examiner, teacher | Course web

Degree Project in Computer Engineering, First Cycle (II142X), examiner | Course web

Degree Project in Computer Science and Engineering, First Cycle (DA150X), assistant | Course web

Degree Project in Computer Science and Engineering, specialising in Embedded Systems, Second Cycle (DA248X), examiner, teacher | Course web

Degree Project in Electrical Engineering, specialising in Embedded Systems, Second Cycle (EA248X), examiner | Course web

Degree Project in Information and Communication Technology, First Cycle (II143X), examiner | Course web

Degree Project in Information and Communication Technology, First Cycle (IA150X), examiner | Course web