Similarly to multi-core CPUs, also network devices increasingly rely on parallel packet processing engines to achieve insanely high throughput (up to 16 pipes to process 50 terabits per second on a single chip). In our recent paper accepted at ACM SIGMETRICS, we unveil, quantify, and mitigate the impact of deploying existing network monitoring mechanisms on multi-pipe network devices. Our design, called PipeCache, allows to reduce memory requirements (a constrained resource on ASIC devices) up to 16x! A PDF of the paper is available here. Code is available here.

Can one process the equivalent of 1 Tbps of traffic on a single server? In our NSDI’23 paper, we leverage disaggregation principles to push the boundary of what CPU-based packet processors can achieve in terms of throughput for a variety of network functions. For the paper PDF click here. This is a joint work with two visiting doctoral students from Roma tre University. All code is available here.

A video of Tommaso’s NSDI talk:

Congratulations to Alexandros for defending his licentiate thesis titled “Understanding the Capabilities of Route Collectors to Observe Stealthy Hijacks”! The supervisors are Marco Chiesa and Dejan Kostic. Thanks to the advanced reviewer Prof. Gerald Q. Maguire Jr., the special reviewer Prof. Alberto Dainotti, and the examiner Prof. Roberto Guanciale for their thorough work.

You can find more about Alexandros’ work by reading this thesis here.

We are hugely honored that our “Packet Order Matters!” paper received the Community Award at NSDI 2022! More details are available in our earlier post.

Presentation video is below:
[youtube https://www.youtube.com/watch?v=0M8EiLYgYpA]

One project proposal led by Marco Chiesa has recently been funded by Vetenskaprådet (VR, Swedish Research Council in English).

The project is a Starting Grant with a single PI (Marco Chiesa), titled “ResoNet: Resilient Optimized Network Synthesis”, and funded with 4M SEK and running between 2022 and 2025. The project aims at developing new network synthesis methods that guarantee performance and robustness requirements.

See a list of all funded VR projects here.