Publications by Mats Brorsson
Refereegranskade
Artiklar
[1]
I. Oz et al., "Regression-Based Prediction for Task-Based Program Performance," Journal of Circuits, Systems and Computers, vol. 28, no. 4, 2019.
[2]
M. K. Bhatti et al., "Locality-aware task scheduling for homogeneous parallel computing systems," Computing, vol. 100, no. 6, pp. 557-595, 2018.
[3]
M. Aldinucci et al., "Preface," The international journal of high performance computing applications, vol. 31, no. 3, pp. 179-180, 2017.
[4]
M. K. Bhatti et al., "Scheduling of Parallel Tasks with Proportionate Priorities," ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING, vol. 41, no. 8, pp. 3279-3295, 2016.
[5]
A. Muddukrishna, P. A. Jonsson and M. Brorsson, "Characterizing task-based OpenMP programs," PLOS ONE, vol. 10, no. 4, pp. e0123545, 2015.
[6]
A. Muddukrishna, P. A. Jonsson and M. Brorsson, "Locality-aware Task Scheduling and Data Distribution for OpenMP Programs on NUMA Systems and Manycore Processors," Scientific Programming, 2015.
[7]
G. Varisteas and M. Brorsson, "Palirria: accurate on-line parallelism estimation for adaptive work-stealing," Concurrency and Computation, 2015.
[8]
A. Podobas, M. Brorsson and K.-F. Faxén, "A comparative performance study of common and popular task-centric programming frameworks," Concurrency and Computation, 2013.
[9]
A. Podobas, M. Brorsson and V. Vlassov, "Exploring heterogeneous scheduling using the task-centric programming model," Lecture Notes in Computer Science, vol. 7640, 2013.
[10]
H. Fang and M. Brorsson, "Scalable directory architecture for distributed shared memory chip multiprocessors," SIGARCH Computer Architecture News, vol. 36, no. 5, pp. 56-64, 2008.
[11]
S. Karlsson and M. Brorsson, "Priority Based Messaging for Software Distributed Shared Memory," Cluster Computing, vol. 6, pp. 161-169, 2003.
[12]
C. Brunschen and M. Brorsson, "OdinMP/CCp - a portable implementation of OpenMP for C," Concurrency, vol. 12, no. 12, pp. 1193-1203, 2000.
[13]
M. Brorsson and M. Kral, "Performance tuning software DSM applications using visualisation," Journal of Supercomputing, vol. 13, pp. 249-65, 1999.
[14]
P. Stenström et al., "Boosting the performance of shared memory multiprocessors," Computer, vol. 30, pp. 63-70, 1997.
[15]
E. W. Parsons, M. Brorsson and K. C. Sevcik, "Predicting the performance of distributed virtual shared-memory applications," IBM Systems Journal, vol. 36, pp. 527-49, 1997.
[16]
M. Brorsson and P. Stenstrom, "Characterising and modelling shared memory accesses in multiprocessor programs," Parallel Computing, vol. 22, pp. 869-93, 1996.
Konferensbidrag
[17]
M. Du et al., "Time series modeling of market price in real-time bidding," in ESANN 2019 - Proceedings, 27th European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning, 2019, pp. 643-648.
[18]
A. Javed Awan et al., "Identifying the potential of Near Data Processing for Apache Spark," in Proceedings of the International Symposium on Memory Systems, MEMSYS 2017, 2017, pp. 60-67.
[19]
M. Du et al., "Improving real-time bidding using a constrained markov decision process," in 13th International Conference on Advanced Data Mining and Applications, ADMA 2017, 2017, pp. 711-726.
[20]
A. Podobas and M. Brorsson, "Empowering OpenMP with Automatically Generated Hardware," in International Conference on Embedded Computer Systems: Architectures, MOdeling and Simulation, 2016.
[21]
A. Muddukrishna et al., "Grain Graphs : OpenMP Performance Analysis Made Easy," in 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP'16), 2016.
[22]
A. J. Awan et al., "Micro-architectural Characterization of Apache Spark on Batch and Stream Processing Workloads," in The 6th IEEE International Conference on Big Data and Cloud Computing, 2016, pp. 59-66.
[23]
A. J. Awan et al., "Node architecture implications for in-memory data analytics on scale-in clusters," in 3rd IEEE/ACM International Conference on Big Data Computing, Applications and Technologies, 2016, pp. 237-246.
[24]
S. Issa, P. Romano and M. Brorsson, "Green-CM : Energy efficient contention management for Transactional Memory," in 44th International Conference on Parallel Processing (ICPP), September 2015, 2015.
[25]
A. J. Awan et al., "How Data Volume Affects Spark Based Data Analytics on a Scale-up Server," in Big Data Benchmarks, Performance Optimization, and Emerging Hardware : 6th Workshop, BPOE 2015, Kohala, HI, USA, August 31 - September 4, 2015. Revised Selected Papers, 2015, pp. 81-92.
[26]
A. Javed Awan et al., "Performance Characterization of In-Memory Data Analytics on a Modern Cloud Server," in Proceedings - 2015 IEEE 5th International Conference on Big Data and Cloud Computing, BDCloud 2015, 2015, pp. 1-8.
[27]
A. Podobas et al., "Considering Quality-of-Service for Resource Reduction using OpenMP," in MULTIPROG 2014 : Programmability Issues for Heterogeneous Multicores,Jan 22, 2014,Viena, Austria, 2014.
[28]
G. Varisteas and M. Brorsson, "DVS: Deterministic Victim Selection to ImprovePerformance in Work-Stealing Schedulers," in MULTIPROG 2014: Programmability Issues for Heterogeneous Multicores, 2014.
[29]
M. K. Bhatti et al., "Noodle : A Heuristic Algorithm for Task Scheduling in MPSoC Architectures," in Proceedings - 2014 17th Euromicro Conference on Digital System Design, DSD 2014, 2014, pp. 667-670.
[30]
G. Varisteas and M. Brorsson, "Palirria : Accurate on-line parallelism estimation for adaptive work-stealing," in PMAM'14 Proceedings of Programming Models and Applications on Multicores and Manycore, 2014, pp. 120-130.
[31]
A. Podobas, M. Brorsson and V. Vlassov, "TurboBŁYSK : Scheduling for improved data-driven task performance with fast dependency resolution," in Using and Improving OpenMP for Devices, Tasks, and More : 10th International Workshop on OpenMP, IWOMP 2014, Salvador, Brazil, September 28-30, 2014. Proceedings, 2014, pp. 45-57.
[32]
A. Muddukrishna et al., "Locality-aware Task Scheduling and Data Distribution on NUMA Systems," in OpenMP in the Era of Low Power Devices and Accelerators : 9th International Workshop on OpenMP, IWOMP 2013, Canberra, Australia, September 16-18, 2013, 2013.
[33]
A. Muddukrishna et al., "Task Scheduling on Manycore Processors with Home Caches," in Euro-Par 2012 Workshops, 2013.
[34]
O. Tahan, M. Brorsson and M. Shawky, "Introducing task cancellation to OpenMP," in Lect. Notes Comput. Sci., 2012, pp. 73-87.
[35]
G. Varisteas, M. Brorsson and K.-F. Faxén, "Resource management for task-based parallel programs over a multi-kernel. : BIAS: Barrelfish Inter-core Adaptive Scheduling," in Proceedings of the 2012 workshop on Runtime Environments, Systems, Layering and Virtualized Environments (RESoLVE’12), 2012, pp. 32-36.
[36]
G. Varisteas and M. Brorsson, "Towards automatic adaptation of resource requirements to actual workload for task-based programming models," in MCC-2012. Fifth Swedish Workshop on Multicore Computing. KTH University. Stockholm, Sweden. November 22-23, 2012, 2012.
[37]
A. Muddukrishna, M. Brorsson and V. Vlassov, "A Locality Approach to Architecture-aware Task-scheduling in OpenMP," in MCC-2011. Fourth Swedish Workshop on Multicore Computing. Linköping University. Linköping, Sweden. November 23-25, 2011., 2011.
[38]
M. Collin, M. Brorsson and J. Öberg, "A performance and energy exploration of dictionary code compression architectures," in 2011 International Green Computing Conference and Workshops (IGCC), 2011, pp. 1-8.
[39]
A. Podobas and M. Brorsson, "Architecture-aware Task-scheduling : A thermal approach," in http://faspp.ac.upc.edu/faspp11/, 2011.
[40]
G. Varisteas, M. Brorsson and K.-F. Faxén, "Dynamic Inter-core Scheduling in Barrelfish : avoiding contention with malleable process domains," in MCC-2011. Fourth Swedish Workshop on Multicore Computing. Linköping University. Linköping, Sweden. November 23-25, 2011., 2011.
[41]
I. Alexandru et al., "Investigating the Potential of Energy-savings Using a Fine-grained Task Based Programming Model on Multi-cores," in 2nd Workshop on Applications for Multi and Many Core Processors. San Jose. June 4-8th, 2011, 2011.
[42]
A. Podobas and M. Brorsson, "A Comparison of some recent Task-based Parallel Programming Models," in Proceedings of the 3rd Workshop on Programmability Issues for Multi-Core Computers, (MULTIPROG'2010), Jan 2010, Pisa, 2010.
[43]
A. Podobas and M. Brorsson, "Cool-Cores : Thermal-aware Task Scheduling for OpenMP," in THIRD SWEDISH WORKSHOP ON MULTI-CORE COMPUTING - MCC'10, 2010.
[44]
Y. Bao and M. Brorsson, "An Implementation of Cache-Coherence for the Nios II ™ Soft-core processor," in 2nd Swedish Workshop on Multi-core Computing, 2009.
[45]
M. Collin and M. Brorsson, "Two-Level Dictionary Code Compression : a New Scheme to Improve Instruction Code Density of Embedded Applications," in CGO 2009 : INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, PROCEEDINGS, 2009, pp. 231-242.
[46]
M. Nikitovic, T. De Schampheleire and M. Brorsson, "A study on periodic shutdown for adaptive CMPs in handheld devices," in 2008 13TH ASIA-PACIFIC COMPUTER SYSTEMS ARCHITECTURE CONFERENCE, 2008, pp. 308-314.
[47]
M. Collin and M. Brorsson, "Improving Code Density of Embedded Software using a 2-level Dictionary Code Compression Architecture," in 2008 13TH ASIA-PACIFIC COMPUTER SYSTEMS ARCHITECTURE CONFERENCE, 2008, pp. 284-291.
[48]
H. Fang and M. Brorsson, "Scalable directory architecture for distributed shared memory chip multiprocessors," in Proceedings of the 1st Swedish Workshop on Multi-core Computing, 2008, pp. 73-81.
[49]
M. Radu et al., "Work in progress - graduate exchange program in microelectronics system engineering," in FIE : 2008 IEEE FRONTIERS IN EDUCATION CONFERENCE, VOLS 1-3, 2008, pp. 563-564.
[50]
M. Brorsson and M. Collin, "Adaptive and flexible dictionary code compression for embedded applications," in Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, 2006, pp. 113-124.
[51]
S. Karlsson and M. Brorsson, "A free openmp compiler and run-time library infrastructure for research on shared memory parallel computing," in Proceedings of the 16th IASTED International Conference on Parallel and Distributed Computing and Systems, 2004, pp. 354-361.
[52]
M. Nikitovic and M. Brorsson, "A low power strategy for future mobile terminals," in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, pp. 702-703.
[53]
M. Nikitovic and M. Brorsson, "A multiprogrammed workload model for energy and performance estimation of adaptive chip-multiprocessors," in Proceedings of 18th International Parallel and Distributed Processing Symposium, 2004, 2004, pp. 3449-3456.
[54]
T. Palm, J. Hallberg and M. Brorsson, "Cache-Conscious Allocation of Pointer-Based Data Structures Revisited with HW/SW Prefetching," in Proceedings of the 2003 Workshop on Duplicating, Deconstructing and Debunking (WDDD-2), 2003, pp. 2-13.
[55]
M. Collin and M. Brorsson, "Low Power Instruction Fetch using Profiled Variable Length Instructions," in IEEE International SoC Conference, 2003.
[56]
M. Collin and M. Brorsson, "Low Power Instruction Fetch using Variable Length Instructions," in Swedish System-on-Chip Conference 2003 (SSoCC’03), 2003.
[57]
S. Karlsson, S. -. Lee and M. Brorsson, "A Fully Compliant OpenMP implementation on Software Distributed Shared Memory," in Proceedings of the 2002 International Conference on High Performance Computing HiPC’02, 2002.
[58]
M. Nikitovic and M. Brorsson, "An adaptive chip-multiprocessor architecture for future mobile terminals," in CASES ’02, 2002, pp. 43-49.
[59]
E. Ayguadé et al., "OpenMP Performance Analysis in the INTONE Project," in Proceedings of EWOMP’2001, 2001.
[60]
S. Karlsson and M. Brorsson, "Priority Based Messaging for Software Distributed Shared Memory – Model and Implementation," in Proceedings of CAC’01, Workshop on Communication Architecture for Clusters, 2001.
[61]
M. Brorsson, "Intone—Tools and Environment for OpenMP on Clusters of SMPs," in Proceedings of WOMPAT’2000, 2000.
[62]
S. Karlsson and M. Brorsson, "An Infrastructure for Portable and Efficient Software DSM," in 1st Workshop on Software Distributed Shared Memory (WSDSM’99), 1999.
[63]
S. Karlsson and M. Brorsson, "Producer-push-a protocol enhancement to page-based software distributed shared memory systems," in Proceedings of ICPP’99 : 1999 International Conference on Parallel Processing, 1999, pp. 291-300.
[64]
A. Rodman and M. Brorsson, "Programming effort vs. performance with a hybrid programming model for distributed memory parallel architectures," in Proceedings of Euro-Par’99, 1999, pp. 888-98.
[65]
S. Karlsson and M. Brorsson, "A comparative characterization of communication patterns in applications using MPI and shared memory on an IBM SP2," in Network-Based Parallel Computing. Communication, Architecture, and Applications. Second International Workshop, CANPC ’98, 1998, pp. 189-201.
[66]
M. Brorsson and M. Kral, "Visualisation for performance tuning of DVSM applications," in Proceedings of the Thirty-First Hawaii International Conference on System Sciences, 1998, pp. 532-41.
[67]
M. Brorsson, "Performance tuning of small scale shared memory multiprocessor applications using visualisation," in Proceedings of 10th International Conference on Parallel and Distributed Computing Systems, 1997, pp. 155-62.
[68]
L. Barriga, M. Brorsson and R. Ayani, "A model for parallel simulation of distributed shared memory," in Proceedings of MASCOTS ‘96 - 4th International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 1996, pp. 179-84.
[69]
M. Brorsson, "SM-prof : a tool to visualise and find cache coherence performance bottlenecks in multiprocessor programs," in Proceedings of Sigmetrics’95, 1995, pp. 178-87.
[70]
M. Brorsson and P. Stenstrom, "Modelling accesses to migratory and producer-consumer characterised data in a shared memory multiprocessor," in Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing, 1994, pp. 612-19.
[71]
M. Brorsson and P. Stenstrom, "Modelling accesses to stationary data in a shared memory multiprocessor," in Proceedings of 1994 7th International Conference on Parallel and Distributed Computing Systems, 1994, pp. 802-7.
[72]
P. Stenstrom, M. Brorsson and L. Sandberg, "An adaptive cache coherence protocol optimized for migratory sharing," in Proceedings of the International Symposium on Computer Architecture (ISCA’93), 1993, pp. 109-18.
[73]
M. Brorsson et al., "The CacheMire Test Bench – A Flexible and Effective Approach for Simulation of Multiprocessors," in Proceedings of the 26th Annual Simulation Symposium, 1993, pp. 41-49.
[74]
M. Brorsson and P. Stenström, "Visualising Sharing Behaviour in relation to Shared Memory Management," in Proceedings of the 1992 International Conference on Parallel and Distributed Systems, 1992, pp. 528-536.
[75]
M. Brorsson, "Local vs. global memory in the IBM RP3 : experiments and performance modelling," in Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing (Cat. No.91TH0396-2), 1991, pp. 496-503.
[76]
M. Brorsson and I. Kruzela, "Museion-reuse support system for design of service features," in Tenth Annual International Phoenix Conference on Computers and Communications (Cat. No.91CH2959-5), 1991, pp. 361-8.
[77]
M. Brorsson, "A decentralized virtual memory scheme implemented on an emulated multiprocessor," in Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Vol.I : Architecture Track (IEEE Cat. No. 89TH0242-8), 1989, pp. 286-95.
Icke refereegranskade
Konferensbidrag
[78]
M. Brorsson, "MipsIt-a simulation and development environment using animation for computer architecture education," in Workshop on Computer Architecture Education, 2002, pp. 65-72.
Böcker
[79]
Kapitel i böcker
[80]
I. Kruzela and M. Brorsson, "Human Aspects and Organizational Issues of Software Reuse," in Software Reuse and Reverse Engineering in Practice, London : Chapman and Hall, 1992, pp. 521-534.
Rapporter
[81]
A. Podobas, M. Brorsson and K.-F. Faxén, "A Quantitative Evaluation of popular Task-Centric Programming Models and Libraries," , TRITA-ICT-ECS R, 12:03, 2012.
[82]
G. Varisteas and M. Brorsson, "Automatic Adaptation of Resources to Workload requirements in Nested Fork-join Programming Model," KTH Royal Institute of Technology, TRITA-ICT/ECS R, 12:04, 2012.
[83]
[84]
B. Sleeba, M. Collin and M. Brorsson, "An ASIC Implementation and Evaluation of a Profiled Low-Energy Instruction Set Architecture Extension," KTH Microelectronics and Information Technology, 2003.
[85]
L. Barriga, M. Brorsson and R. Ayani, "Hybrid Parallel Simulation of Distributed Shared-Memory Architectures," Department of Teleinformatics, KTH, Royal Institute of Technology, Sweden, 1996.
[86]
E. W. Parsons, M. Brorsson and K. C. Sevcik, "Modelling Performance of Distributed Virtual Shared Memory Systems for the Next Decade," Computer Systems Research Institute, University of Toronto, Canada, 1996.
[87]
[88]
M. Brorsson, "Emulation of Shared Virtual Memory on an Experimental Multiprocessor," Department of Computer Engineering, Lund University, Sweden, 1989.
[89]
M. Brorsson, "Performance Impact of Code and Data Placement on the IBM RP3," IBM Research Report RC 14651, 1989.
Övriga
[90]
A. J. Awan et al., "Architectural Impact on Performance of In-memoryData Analytics: Apache Spark Case Study," (Manuscript).
[91]
A. Podobas and M. Brorsson, "From software to parallel hardware through the OpenMP programming model," (Manuscript).
Senaste synkning med DiVA:
2024-05-05 01:52:22