Disputationer

Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging

6 sep

Disputationer

Elektrisk mätteknik

fredag 2013-09-06, 10.00

Plats: KTH main campus, Lecture hall F3, Lindstedtsvägen 26

Respondent: Martin Lapisa , Micro and Nanosystems

2013-09-06T10:00:00.899+02:00 2013-09-06T10:00:00.899+02:00 Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging (Disputationer) KTH main campus, Lecture hall F3, Lindstedtsvägen 26 (KTH, Stockholm, Sweden)Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging (Disputationer)

Modeling and Experimental Studies of High Power Impulse Sputtering Discharges

18 sep

Disputationer

onsdag 2013-09-18, 10.00 - 12.00

Plats: Sal F3, Lindstedsvägen 26

Respondent: Ms Chunqing Huo

2013-09-18T10:00:00.581+02:00 2013-09-18T12:00:00.581+02:00 Modeling and Experimental Studies of High Power Impulse Sputtering Discharges (Disputationer) Sal F3, Lindstedsvägen 26 (KTH, Stockholm, Sweden)Modeling and Experimental Studies of High Power Impulse Sputtering Discharges (Disputationer)