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Deep Dive Code Analysis and Optimization

Time: Tue 2017-02-07 09.30 - 16.00

Location: Room 523, PDC, KTH

Contact:

PDC Support

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Deep Dive Code Analysis and Optimization

This one-day workshop will demonstrate how the latest Allinea tool suite supports more efficient and more robust HPC code development practices when working both at scale and across platforms. Please join us to discover how deeper dive code behaviour analysis provides opportunities for performance enhancement and vectorization, and how Allinea integration capabilities enable best practice monitoring and regression testing for research teams. The trainer will be an HPC tools expert from Allinea .

Please note that this workshop will be run at three of the Swedish National Infrastructure for Computing (SNIC) centres, so if you cannot attend the workshop at PDC on the 7th of February, you are welcome to attend the workshop in Linköping on the 8th of February  or in Lund on the 9th .

Registration for the workshop at PDC is now open - click here to register!

Prerequisites

You will need to have an account on the PDC systems in order to attend and participate in the computer labs for the course. Please apply for an account  in good time before the course if you do not already have a PDC account. Participants should be able to program in one or more of C, C++ or Fortran. Knowledge of MPI and OpenMP is beneficial. For the practical hands-on sessions participants should bring their own laptop. The laptop should be capable of accessing the internet via eduroam.

Provisional programme

09:30-10:00 Arrival and welcome

10:00-10:30 Enabling life changing discovering with Allinea tools (presentation)

  • Introduction, round table
  • Overview of Allinea's HPC tools
  • Allinea’s latest news and roadmap

  10:30-11:00 Characterising application performance

  • Theory: The basis of code performance - algorithm complexity
  • Getting started with Allinea Performance Reports
  • Understanding and addressing scalability issues

11:00-11:30 Coffee break

  11:30-12:00 Counter-intuitive performance analysis problems: load imbalances

  • Theory: Load balancing in HPC (e.g. load balancing with space-filling curves)
  • Introduction to Allinea Forge's profiling metrics
  • Detecting and fixing the bottlenecks behind load imbalances with Allinea Forge

  12:00-12:30 Improving memory access

  • Theory: Learning to feed a CPU - caching, memory prefetch...
  • Allinea Forge CPU metrics deep dive
  • Identifying and improving obvious performance bottlenecks

12:30-13:30 Lunch

  13:30-14:30 Automated debugging: integrating Allinea DDT within development workflows

  • Theory: Version control, regression testing and continuous integration
  • Getting familiar with Allinea Forge using “offline mode”
  • Adding debuggers into your everyday work

  14:30-15:00 Writing correct vectorized code

  • Theory: Development techniques for vectorization
  • Identifying unvectorized loops
  • Rearranging algorithms to enable vectorization

  15:00-15:30 Memory debugging deep dive

  • Theory: What are memory bugs and how to dig them up
  • Introduction to Allinea Forge’s memory debugging features
  • Detecting and resolving memory related bugs

  15:30-16:00 Open discussion

  • What is currently scheduled for the next 6 months?
  • What does PDC-KTH expect from Allinea and HPC tools?